000 01234cam a22003134a 4500
001 12468542
005 20191011133113.0
008 010713s2002 njua b 001 0 eng
010 _a 2001036711
020 _a 81-7808-603-4
040 _aDLC
_dDLC
042 _apcc
050 0 0 _aTK7874.66
_b.Y46 2002
082 0 0 _a621.39/5
_221
100 1 _aYeo, Kiat Seng,
_d1964-
245 1 0 _aCMOS/BiCMOS ULSI :
_blow voltage, low power /
_cKiat-Seng Yeo, Samir S. Rofail, Wang-Ling Goh.
260 _aUpper Saddle River, NJ :
_bPrentice Hall,
_cc2002.
300 _axxv, 585 p. :
_bill. ;
_c24 cm.
440 0 _aPrentice Hall modern semiconductor design series
504 _aIncludes bibliographical references and index.
650 0 _aLow voltage integrated circuits
_xDesign and construction.
650 0 _aIntegrated circuits
_xUltra large scale integration
_xDesign and construction.
650 0 _aMetal oxide semiconductors, Complementary
_xDesign and construction.
700 1 _aRofail, Samir S.,
_d1948-
700 1 _aGoh, Wang-Ling.
906 _a7
_bcbc
_corignew
_d1
_eocip
_f20
_gy-gencatlg
942 _2udc
_cBK
999 _c22163
_d22163