000 00608nam a2200253Ia 4500
008 160615s9999 xx 000 0 und d
020 _a81-7808-558-5
037 _a3009
037 _d20/07/2002
100 _aYALAMANCHILI(Sudhakar)
245 _aIntroductory VHDL from simulation to synthesis
260 _aNew Delhi
260 _bPearson Education Asia
260 _c2002
300 _aPbk xix p. + 401
365 _b"295.00� "
365 _cRS
942 _cBooks
999 _c22168
_d22168