000 | 01319cam a2200301 a 4500 | ||
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001 | 15146131 | ||
005 | 20191023154653.0 | ||
008 | 080117s2008 si a b 001 0 eng | ||
010 | _a 2008002506 | ||
020 | _a9780470823231 (cloth) | ||
035 | _a(OCoLC)ocn191317977 | ||
040 |
_aDLC _dBTCTA _dBAKER _dYDXCP _dC#P _dBWX _dIXA _dDLC |
||
050 | 0 | 0 |
_aTK7868.D5 _bL535 2008 |
082 | 0 | 0 |
_a621.381 _222 |
100 | 1 | _aLin, Ming-Bo. | |
245 | 1 | 0 |
_aDigital system design and practices : _busing Verilog HDL and FPGAs / _cMing-Bo Lin. |
260 |
_aSingapore ; _aHoboken, NJ : _bJ. Wiley & Sons, _cc2008. |
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300 |
_axxiv, 809 p. : _bill. ; _c26 cm. |
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504 | _aIncludes bibliographical references and index. | ||
650 | 0 | _aDigital electronics. | |
650 | 0 | _aField programmable gate arrays. | |
650 | 0 | _aVerilog (Computer hardware description language) | |
856 | 4 | 2 |
_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0810/2008002506-d.html |
856 | 4 | 1 |
_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0810/2008002506-t.html |
906 |
_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg |
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942 |
_2udc _cBK |
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999 |
_c25553 _d25553 |