| 000 | 01547cam a22003857i 4500 | ||
|---|---|---|---|
| 001 | 20097045 | ||
| 005 | 20191216151737.0 | ||
| 008 | 171026t20172017nyua b 001 0 eng c | ||
| 010 | _a 2017446855 | ||
| 020 | _a9789387067509 | ||
| 035 | _a(OCoLC)ocn959648624 | ||
| 040 |
_aYDX _beng _erda _dOCLCQ _dTEF _dBDX _dYDX _dOCLCF _dOSU _dDLC |
||
| 042 | _apcc | ||
| 050 | 0 | 0 |
_aTK7895.G36 _bU57 2017 |
| 082 | 0 | 0 |
_a621.39/2 _223 |
| 100 | 1 |
_aÜnsalan, Cem, _eauthor. |
|
| 245 | 1 | 0 |
_aDigital system design with FPGA : _bimplementation using Verilog and VHDL / Cem Ünsaln, Yeditepe University, Bora Tar, The Ohio State University. |
| 264 | 1 |
_aNew York, NY : _bMcGraw-Hill Education, _c[2017] |
|
| 264 | 4 | _c©2017 | |
| 300 |
_axv, 384 pages : _billustrations ; _c25 cm |
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| 336 |
_atext _btxt _2rdacontent |
||
| 337 |
_aunmediated _bn _2rdamedia |
||
| 338 |
_avolume _bnc _2rdacarrier |
||
| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 | _aField programmable gate arrays. | |
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aVHDL (Computer hardware description language) | |
| 650 | 7 |
_aField programmable gate arrays. _2fast _0(OCoLC)fst00923910 |
|
| 650 | 7 |
_aVerilog (Computer hardware description language) _2fast _0(OCoLC)fst01165388 |
|
| 650 | 7 |
_aVHDL (Computer hardware description language) _2fast _0(OCoLC)fst01163476 |
|
| 700 | 1 |
_aTar, Bora, _eauthor. |
|
| 906 |
_a7 _bcbc _cpccadap _d2 _encip _f20 _gy-gencatlg |
||
| 942 |
_2udc _cBK |
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| 999 |
_c87415 _d87415 |
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