| 000 | 01731cam a2200373 a 4500 | ||
|---|---|---|---|
| 001 | 16490109 | ||
| 005 | 20240226111050.0 | ||
| 008 | 101005s2010 maua b 001 0 eng c | ||
| 010 | _a 2010484132 | ||
| 015 |
_aGBA978531 _2bnb |
||
| 016 | 7 |
_a015346315 _2Uk |
|
| 020 | _a9780123744388 (hbk. : alk. paper) | ||
| 035 | _a(OCoLC)ocn184827815 | ||
| 040 |
_aUKM _cUKM _dBTCTA _dBAKER _dYDXCP _dBWX _dTXA _dW2U _dDLC |
||
| 042 | _apcc | ||
| 050 | 0 | 0 |
_aTK7895.G36 _bH37 2010 |
| 082 | 0 | 0 |
_a621.3815 _223 |
| 100 | 1 |
_aHassan, Hassan, _d1979- |
|
| 245 | 1 | 0 |
_aLow-power design of nanometer FPGAs : _barchitecture and EDA / _cHassan Hassan, Mohab Anis. |
| 260 |
_aBurlington, MA : _bMorgan Kaufmann, _cc2010. |
||
| 300 |
_axiv, 241 p. : _bill. ; _c25 cm. |
||
| 490 | 0 | _aSystems on silicon | |
| 504 | _aIncludes bibliographical references (p. 221-235) and index. | ||
| 505 | 0 | _aFPGA overview : architecture and CAD -- Power dissipation in modern FPGAs -- Power estimation in FPGAs -- Dynamic power reduction techniques in FPGAs -- Leakage power reduction in FPGAs using MTCMOS techniques -- Leakage power reduction in FPGAs through input pin reordering. | |
| 650 | 0 |
_aField programmable gate arrays _xComputer-aided design. |
|
| 650 | 0 |
_aNanoelectromechanical systems _xComputer-aided design. |
|
| 650 | 0 |
_aLow voltage integrated circuits _xComputer-aided design. |
|
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration. |
|
| 700 | 1 | _aAnis, Mohab. | |
| 906 |
_a7 _bcbc _cpccadap _d2 _encip _f20 _gy-gencatlg |
||
| 942 |
_2udc _cBK |
||
| 999 |
_c89024 _d89024 |
||